Principal or Sr. Principal Digital Verification Engineer

Northrop Grumman

Date: Sep 23, 2022
City: Cincinnati, OH
Contract type: Full time
Northrop Grumman

RELOCATION ASSISTANCE: Relocation assistance may be available


TRAVEL: Yes, 10% of the Time


Join Northrop Grumman on our continued mission to push the boundaries of possible across land, sea, air, space, and cyberspace. Enjoy a culture where your voice is valued and start contributing to our team of passionate professionals providing real-life solutions to our world’s biggest challenges. We take pride in creating purposeful work and allowing our employees to grow and achieve their goals every day by Defining Possible. With our competitive pay and comprehensive benefits, we have the right opportunities to fit your life and launch your career today.

Join Northrop Grumman Mission Systems Sector (NGMS) a leading global provider of secure software-defined, hardware enabled mission systems. Our company is pioneering capabilities in a wide variety of technologies that keep our nation and our allies safe from undersea to space and cyberspace.

Our Advanced Processing Solutions Team (APS) is working to develop next generation high performance computing systems to meet the mission demands of the NGMS Networked Information Solutions (NIS) business.

NGMS - APS is seeking cleared or clearable Principal or Sr. Principal Digital Verification Engineers to support ASIC and FPGA product development as part of our innovative Digital Technologies Organization.

Essential Duties:

As a Digital Verification Engineer you will work closely with design and verification engineers and will utilize your knowledge of modern verification methods, tools and techniques. The individual will perform functional verification of register transfer level (RTL) code of a complex ASIC at block level and SOC level using UVM (Universal Verification Methodology) and SystemVerilog and Cadence Xcelium simulation tool. This task includes but not limited to development of test bench, tests, verification IP (VIP), verification models, coverage models, extensive simulation and debug, code coverage and functional coverage, generation and analysis of reports and metrics, documentation etc. This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.

This position is located in Cincinnati, OH.


*This position can be filled at either Principal or Sr. Principal level*

Basic Qualifications:
  • Bachelor\'s degree in Electrical Engineering or other Engineering discipline with 5 years of relevant experience; or Master\'s with 3 years of relevant experience; or PhD with 0 years of experience.
  • Bachelor\'s degree in Electrical Engineering or other Engineering discipline with 9 years of relevant experience; or Master\'s with 7 years of relevant experience; or PhD with 3 years of relevant experience.
  • Knowledge of Universal Verification Methodology (UVM).
  • Experience developing test plans, participating in reviews, test development and RTL debugging.
  • US Citizenship with the ability to obtain and maintain Secret Security Clearance.
Preferred Qualifications:
  • Experience in HDL (VHDL/Verilog) and SystemVerilog (HVL).
  • Experience with SystemVerilog Assertions (SVA).
  • Familiarity with a coverage-driven verification methodology from planning through closure.
  • Knowledge of industry standard interfaces.
  • Experience with object oriented programming languages and concepts.
  • Experience with Mentor Graphics and/or Cadence Verification tools.
  • ASIC/ASIC Design experience.
  • Knowledge of digital signal processing.
  • Experience with scripting languages (Bash, Perl, Python, Tcl).
  • Active Secret security clearance.
This position offers the option of a 9/80 work schedule. The 9/80 schedule allows employees who work nine-hour days Monday through Thursday to take every other Friday off.

Salary Range: $101,440.00 - $152,160.00Salary Range 2: $125,800.00 - $188,600.00

Employees may be eligible for a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business.

The health and safety of our employees and their families is a top priority. The company encourages employees to remain up-to-date on their COVID-19 vaccinations. U.S. Northrop Grumman employees may be required, in the future, to be vaccinated or have an approved disability/medical or religious accommodation, pursuant to future court decisions and/or government action on the currently stayed federal contractor vaccine mandate under Executive Order 14042 .

Northrop Grumman is committed to hiring and retaining a diverse workforce. We are proud to be an Equal Opportunity/Affirmative Action Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO/AA and Pay Transparency statement, please visit . U.S. Citizenship is required for most positions.

How to apply

To apply for this job you need to authorize on our website. If you don't have an account yet, please register.

Post a resume